Dynamic Verification Framework of Approximate Computing Circuits using Quality-Aware Coverage-Based Grey-Box Fuzzing

Approximate computing (AC) has recently emerged as a promising approach to the energy-efficient design of digital systems. For realizing practical AC design, we need verify whether designed circuit can operate correctly under various operating conditions. Namely, verification needs efficiently find fatal logic errors or timing that violate constraint computational quality. This work focuses on where results be observed, quality calculated from results, and is given defined which set with workloads. Then, this paper proposes novel dynamic framework circuit. The key idea proposed incorporate assessment capability into Coverage-based Grey-box Fuzzing (CGF). CGF one most techniques in research field software security testing. By repeating (1) mutation test patterns, (2) execution program (PUT), (3) aggregation coverage information feedback next pattern generation, explore space quickly automatically. On other hand, originally cannot consider by itself. overcoming unawareness CGF, additionally embeds Design Under Verification (DUV) component calculation part Thanks DUV integration, realizes quality-aware loop thus enhances for patterns constraint. In work, quantitatively compared approximate arithmetic circuits between random test. case study an multiply-accumulate (MAC) unit, experimentally confirmed achieved 3.85 10.36 times higher than